The present invention relates, in general, to electronics, and more particularly, to semiconductor packages, structures thereof, and methods of forming semiconductor packages.
In the past, semiconductor packages, such as Plastic Quad Flat Pack No-lead (PQFN) or Quad Flat Pack No-Lead Exposed Pad (QFN-EP) packages have not had easily solderable, visually exposed terminations, because the package designs had terminations on the underside of the semiconductor package for solder joints. The terminations on the edges of such semiconductor packages, which were exposed after singulation, consisted of exposed copper. The exposed copper did not easily solder wet because of copper oxidation. Thus, visual determination that the semiconductor package had soldered effectively to a next level of assembly, such as a printed circuit board, could not be made by optical viewing. Electrical test was the only way to determine electrical connectivity of the soldered terminations. There are some applications where full electrical test of all terminations is difficult or incomplete. Thus, in high reliability applications, such as automotive applications, it has been desired to visually check for termination solder joint integrity. It is for these purposes that wettable flanks, which are solder plated terminations of semiconductor packages, have been developed as a visual aid for the determination of solder operation effectiveness.
Wettable flank plating is an additional process step that deposits a solderable conductive material, such as tin, with a normal conductive material thickness, on the semiconductor package underside terminals and on the exposed edge terminations or flanks. The wettable flank plating protects the copper and allows soldering to occur on this external flank area of the terminations such that optical inspection can be made verifying a good solder fillet joint, and thus a good electrical connection. Although progress has been made in wettable flank processes, improvements in conductive substrate structures and methods of forming such structures are needed to further enhance wettable flanks.
Accordingly, it is desirable to have a method and a structure that provides a packaged semiconductor device that improves the wettable surface coverage for side or flank surfaces of a conductive substrate. It is also desirable for the structure and method to be easily incorporated into manufacturing flows, accommodate multiple die interconnect schemes, and to be cost effective.